Fabrication of multilayer structures comprises, in general, direct wafer bonding or fusion bonding of a first wafer, for example a silicon or silicon-on-insulator (SOT) wafer, onto a second wafer or support, for example made of silicon or sapphire, a bond-strengthening anneal, and thinning of the first wafer so as to form a layer transferred onto the second wafer.
The invention more particularly concerns multilayer structures having a relatively weak bonding interface due to limiting the temperature of the bond-strengthening anneal. After direct wafer bonding, the structure is normally annealed so as to strengthen the bond between the two wafers, that is to say to increase the surface energy of the bond between them. The higher the temperature of the bond-strengthening anneal, the greater the resulting bond or adhesion energy.
There are several cases of multilayer structures in which the bond annealing temperature must be limited to relatively low values.
The first case concerns the fabrication of what are called “heterogeneous” multilayer structures, heterogeneous in that the two wafers to be bonded or assembled have different coefficients of thermal expansion, for example different by at least 10% or 20% at room temperature (20° C.). Heterostructures having such characteristics are especially silicon-on-sapphire (Al2O3) (SOS) structures used particularly in microelectronics or in optoelectronics. During increases in temperature, for example from 200° C. and above, the variations in behaviour of one of the two wafers relative to the other cause stresses and/or strains in the heterostructure that can lead to delamination or detachment of the wafers or layers if present, and/or plastic deformations and/or cracks and/or breakage of one of the substrates or layers if present. This is why, with such structures, the temperature of the bond-strengthening anneal is limited.
A second case concerns multilayer structures in which the first wafer furthermore comprises all or part of a component or a plurality of microcomponents, such as in the case of 3D-integration technology that requires one or more layers of microcomponents to be transferred onto a final support, but also in the case of circuit transfer, as for example in the fabrication of backlit imagers. In this case, the temperature of the bond-strengthening anneal must be limited so as not to damage the previously fabricated micro-components.
When forming these different structures, the edges of the wafers used especially to form the transferred layers and the supports generally are chamfered or have rounded edges. The purpose of this chamfering is to make handling easier and to prevent edge flaking that could occur if these edges were sharp, such flakes being sources of particulate contamination of the surfaces of wafers. The chamfers may have a rounded and/or bevelled form.
The presence of these chamfers, however, prevents good contact between the wafers at their periphery. This adhesion weakness is even more pronounced when the bonding interface is also weak due to the limitation in the temperature of the bond-strengthening anneal as described above. Consequently, there is a peripheral region in which the first wafer or transferred layer is weakly bonded, or not bonded at all. This peripheral region of the first wafer or transferred layer must then be removed because it is liable to break in an uncontrolled way and to contaminate the structure with undesirable fragments or particles.
Hence, once the wafer is bonded onto the support, and after the wafer has been thinned, the transferred layer is trimmed so as to remove the peripheral region over which the chamfers extend. The trimming is normally carried out by mechanically machining, especially by abrasion, the exposed surface of the transferred layer as far down as the supporting second wafer.
A deep mechanical trimming causes peel-off problems both at the bonding interface between the transferred layer and the support and in the transferred layer itself. More precisely, at the bonding interface the peel-off problems correspond to delamination of the transferred layer from the support in certain regions near the periphery of the layer, which may be termed “macro peel-off”. The bond energy is weaker near the periphery of the layer due to the presence of the chamfers. Consequently, this trimming may lead, in this location, to a partial debonding of the layer at its bonding interface with the supporting substrate.
Consequently, there exists a problem of finding a process that allows the first wafer, or transferred layer, in a multilayer structure to be trimmed without the abovementioned drawbacks. The present invention now provides solution to this problem.